Computer chips of today are synchronous. They contain a main clock, which controls the timing of the entire chips. There are problems, however, involved with these clocked designs that are common today.
One problem is speed. A chip can only work as fast as its slowest component. Therefore, if one part of the chip is especially slow, the other parts of the chip are forced to sit idle. This wasted computed time is obviously detrimental to the speed of the chip.
New problems with speeding up a clocked chip are just around the corner. Clock frequencies are getting so fast that signals can barely cross the chip in one clock cycle. When we get to the point where the clock cannot drive the entire chip, we’ll be forced to come up with a solution. One possible solution is a second clock, but this will incur overhead and power consumption, so this is a poor solution. It is also important to note that doubling the frequency of the clock does not double the chip speed, therefore blindly trying to increase chip speed by increasing frequency without considering other options is foolish.
The other major problem with c clocked design is power consumption. The clock consumes more power that any other component of the chip. The most disturbing thing about this is that the clock serves no direct computational use. A clock does not perform operations on information; it simply orchestrates the computational parts of the computer.
New problems with power consumption are arising. As the number of transistors on a chi increases, so does the power used by the clock. Therefore, as we design more complicated chips, power consumption becomes an even more crucial topic. Mobile electronics are the target for many chips.
These chips need to be even more conservative with power consumption in order to have a reasonable battery lifetime.
The natural solution to the above problems, as you may have guessed, is to eliminate the source of these headaches: the clock.
The Caltech Asynchronous Microprocessor is the world’s first asynchronous microprocessor (1989).
Asynchronous, or clock less, design has advantages over the synchronous design.
The first of these advantages is speed. Chips can run at the average speed of all its components instead of the speed of its slowest component, as was the case with a clocked design. Also the need to have a clock running at a speed such that the signal can reach all parts of the chip is eliminated. Therefore, the speed of an asynchronous design is not limited by the size of the chip.
An example of how much an asynchronous design can improve speed is the asynchronous Pentium designed by Intel in 1997 that runs three times as fast as the synchronous equivalent. This speedup is certainly significant and proves the usefulness of a clock less design.
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